Module ariths_gen.multi_bit_circuits.subtractors.ripple_borrow_subtractor
Classes
class SignedRippleBorrowSubtractor (a: Bus,
b: Bus,
prefix: str = '',
name: str = 's_rbs',
**kwargs)-
Class representing signed ripple borrow subtractor.
Signed ripple borrow subtractor represents N-bit signed subtractor which is composed of N one bit subtractor, where the first is a half subtractor and rest are full subtractor. At last XOR gates are used to ensure proper sign extension.
Its downside is its long propagation delay the bigger the circuit is.
B3 A3 B3 A3 B2 A2 B1 A1 B0 A0 │ │ │ │ │ │ │ │ │ │ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ │ SIGN │ B4│ │ B3│ │ B2│ │ B1│ │ │Extend│◄──┤ FS │◄──┤ FS │◄──┤ FS │◄──┤ HS │ │ │ │ │ │ │ │ │ │ │ └──┬───┘ └──┬───┘ └──┬───┘ └──┬───┘ └──┬───┘ ▼ ▼ ▼ ▼ ▼ Bout D3 D2 D1 D0
Description of the init method.
Args
a
:Bus
- First input bus.
b
:Bus
- Second input bus.
prefix
:str
, optional- Prefix name of signed rbs. Defaults to "".
name
:str
, optional- Name of signed rbs. Defaults to "s_rbs".
Expand source code
class SignedRippleBorrowSubtractor(UnsignedRippleBorrowSubtractor, GeneralCircuit): """Class representing signed ripple borrow subtractor. Signed ripple borrow subtractor represents N-bit signed subtractor which is composed of N one bit subtractor, where the first is a half subtractor and rest are full subtractor. At last XOR gates are used to ensure proper sign extension. Its downside is its long propagation delay the bigger the circuit is. ``` B3 A3 B3 A3 B2 A2 B1 A1 B0 A0 │ │ │ │ │ │ │ │ │ │ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ │ SIGN │ B4│ │ B3│ │ B2│ │ B1│ │ │Extend│◄──┤ FS │◄──┤ FS │◄──┤ FS │◄──┤ HS │ │ │ │ │ │ │ │ │ │ │ └──┬───┘ └──┬───┘ └──┬───┘ └──┬───┘ └──┬───┘ ▼ ▼ ▼ ▼ ▼ Bout D3 D2 D1 D0 ``` Description of the __init__ method. Args: a (Bus): First input bus. b (Bus): Second input bus. prefix (str, optional): Prefix name of signed rbs. Defaults to "". name (str, optional): Name of signed rbs. Defaults to "s_rbs". """ def __init__(self, a: Bus, b: Bus, prefix: str = "", name: str = "s_rbs", **kwargs): super().__init__(a=a, b=b, prefix=prefix, name=name, signed=True, **kwargs) # Additional XOR gates to ensure correct sign extension in case of sign addition sign_xor_1 = XorGate(self.get_previous_component(1).a, self.get_previous_component(1).b, prefix=self.prefix+"_xor"+str(self.get_instance_num(cls=XorGate)), parent_component=self) self.add_component(sign_xor_1) sign_xor_2 = XorGate(sign_xor_1.out, self.get_previous_component(2).get_borrow_wire(), prefix=self.prefix+"_xor"+str(self.get_instance_num(cls=XorGate)), parent_component=self) self.add_component(sign_xor_2) self.out.connect(self.N, sign_xor_2.out)
Ancestors
Inherited members
UnsignedRippleBorrowSubtractor
:add_component
get_blif_code_flat
get_blif_code_hier
get_c_code_flat
get_c_code_hier
get_cgp_code_flat
get_circuit_blif
get_circuit_c
get_circuit_def
get_circuit_gates
get_circuit_v
get_circuit_wire_index
get_circuit_wires
get_component_types
get_declaration_blif
get_declaration_c_flat
get_declaration_c_hier
get_declaration_v_flat
get_declaration_v_hier
get_declarations_c_hier
get_declarations_v_hier
get_function_blif_flat
get_function_block_blif
get_function_block_c
get_function_block_v
get_function_blocks_blif
get_function_blocks_c
get_function_blocks_v
get_function_out_blif
get_function_out_c_flat
get_function_out_c_hier
get_function_out_python_flat
get_function_out_v_flat
get_function_out_v_hier
get_hier_subcomponent_def
get_includes_c
get_init_c_flat
get_init_c_hier
get_init_python_flat
get_init_v_flat
get_init_v_hier
get_instance_num
get_invocation_blif_hier
get_invocations_blif_hier
get_multi_bit_components
get_one_bit_components
get_out_invocation_c
get_out_invocation_v
get_outputs_cgp
get_parameters_cgp
get_previous_component
get_prototype_blif
get_prototype_c
get_prototype_python
get_prototype_v
get_python_code_flat
get_triplets_cgp
get_unique_types
get_v_code_flat
get_v_code_hier
save_wire_id
class UnsignedRippleBorrowSubtractor (a: Bus,
b: Bus,
prefix: str = '',
name: str = 'u_rbs',
**kwargs)-
Class representing unsigned ripple borrow subtractor.
Unsigned ripple borrow subtractor represents N-bit unsigned subtractor which is composed of N one bit subtractors, where the first is a half subtractor and rest are full subtractor.
B3 A3 B2 A2 B1 A1 B0 A0 │ │ │ │ │ │ │ │ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ │ │ B3│ │ B2│ │ B1│ │ ┌──┤ FS │◄──┤ FS │◄──┤ FS │◄──┤ HS │ │ │ │ │ │ │ │ │ │ │ └──────┘ └──────┘ └──────┘ └──────┘ ▼ ▼ ▼ ▼ ▼ Bout D3 D2 D1 D0
Description of the init method.
Args
a
:Bus
- First input bus.
b
:Bus
- Second input bus.
prefix
:str
, optional- Prefix name of unsigned rbs. Defaults to "".
name
:str
, optional- Name of unsigned rbs. Defaults to "u_rbs".
Expand source code
class UnsignedRippleBorrowSubtractor(GeneralCircuit): """Class representing unsigned ripple borrow subtractor. Unsigned ripple borrow subtractor represents N-bit unsigned subtractor which is composed of N one bit subtractors, where the first is a half subtractor and rest are full subtractor. ``` B3 A3 B2 A2 B1 A1 B0 A0 │ │ │ │ │ │ │ │ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ │ │ B3│ │ B2│ │ B1│ │ ┌──┤ FS │◄──┤ FS │◄──┤ FS │◄──┤ HS │ │ │ │ │ │ │ │ │ │ │ └──────┘ └──────┘ └──────┘ └──────┘ ▼ ▼ ▼ ▼ ▼ Bout D3 D2 D1 D0 ``` Description of the __init__ method. Args: a (Bus): First input bus. b (Bus): Second input bus. prefix (str, optional): Prefix name of unsigned rbs. Defaults to "". name (str, optional): Name of unsigned rbs. Defaults to "u_rbs". """ def __init__(self, a: Bus, b: Bus, prefix: str = "", name: str = "u_rbs", **kwargs): self.N = max(a.N, b.N) super().__init__(inputs=[a, b], prefix=prefix, name=name, out_N=self.N + 1, signed_out=True, **kwargs) # Bus sign extension in case buses have different lengths self.a.bus_extend(N=self.N, prefix=a.prefix) self.b.bus_extend(N=self.N, prefix=b.prefix) # Gradual addition of 1-bit subtractor components for input_index in range(self.N): # First adder is a half subtractor if input_index == 0: obj_subtractor = HalfSubtractor(self.a.get_wire(input_index), self.b.get_wire(input_index), prefix=self.prefix+"_hs") # Rest adders are full subtractor else: obj_subtractor = FullSubtractor(self.a.get_wire(input_index), self.b.get_wire(input_index), obj_subtractor.get_borrow_wire(), prefix=self.prefix+"_fs"+str(input_index)) self.add_component(obj_subtractor) self.out.connect(input_index, obj_subtractor.get_difference_wire()) if input_index == (self.N-1): self.out.connect(self.N, obj_subtractor.get_borrow_wire())
Ancestors
Subclasses
Inherited members
GeneralCircuit
:add_component
get_blif_code_flat
get_blif_code_hier
get_c_code_flat
get_c_code_hier
get_cgp_code_flat
get_circuit_blif
get_circuit_c
get_circuit_def
get_circuit_gates
get_circuit_v
get_circuit_wire_index
get_circuit_wires
get_component_types
get_declaration_blif
get_declaration_c_flat
get_declaration_c_hier
get_declaration_v_flat
get_declaration_v_hier
get_declarations_c_hier
get_declarations_v_hier
get_function_blif_flat
get_function_block_blif
get_function_block_c
get_function_block_v
get_function_blocks_blif
get_function_blocks_c
get_function_blocks_v
get_function_out_blif
get_function_out_c_flat
get_function_out_c_hier
get_function_out_python_flat
get_function_out_v_flat
get_function_out_v_hier
get_hier_subcomponent_def
get_includes_c
get_init_c_flat
get_init_c_hier
get_init_python_flat
get_init_v_flat
get_init_v_hier
get_instance_num
get_invocation_blif_hier
get_invocations_blif_hier
get_multi_bit_components
get_one_bit_components
get_out_invocation_c
get_out_invocation_v
get_outputs_cgp
get_parameters_cgp
get_previous_component
get_prototype_blif
get_prototype_c
get_prototype_python
get_prototype_v
get_python_code_flat
get_triplets_cgp
get_unique_types
get_v_code_flat
get_v_code_hier
save_wire_id